A memory array, such as a programmable read only memory array (PROM) or a random access memory array (RAM), generally includes an array of binary elements arranged in a matrix of rows and columns having addresses associated therewith and decoders coupled thereto. PROM and RAM devices have been used in electronics, telecommunications, and computer industries for many years.
In a PROM device, the binary elements are permanently, semi-permanently, or temporarily programmed to one of two states so that information programmed in the memory may be read out quickly, but can only be programmed or written into the memory more slowly. Rather than producing a set of custom masks that manufacture a read only memory (ROM) device, a PROM device is typically manufactured instead. A PROM device includes one or more fuses and/or one or more antifuse elements, which allow the PROM to be programmed or written to. By selectively blowing fuses (opening a circuit path) or making antifuses conductive (closing a circuit path) for certain cells in an array of memory cells, a blank PROM can be easily programmed to become a customized ROM for certain applications. This allows PROM devices to be mass produced for a wide array of applications, thereby reducing production cost, increasing profits, and extending the useful life of the equipment used to make the PROM devices (improving return on capital investment).
In a RAM device, the binary elements can be programmed or written to and read out relatively quickly, but the memory must be continuously refreshed to retain the information therein. In the manufacturing of memory devices of all types, processing defects often randomly occur across the memory device. Typically, the memory device is still functional except that one or more rows and/or columns have a defective cell (defective bit). This has led to the development of memory devices having redundant elements (rows, columns, encoders, decoders, etc.) without addresses assigned yet. As needed, such redundant elements may be assigned the address of a defective row or column while the defective row or column is disabled. Such repairs and use of redundant elements are often provided by fuse elements that may be used to repair and reprogram addressing. For example, U.S. Pat. No. 4,250,570 discusses some conventional ways to repair memory devices using redundant elements.
It is desirable to test integrated circuit devices to determine whether a chip meets a manufacturing specification for performance, functionality, and reliability. Typically, finished integrated circuit chips are electrically tested prior to being cut from the wafer. Often a probe card having a set of test probes positioned to contact bond pads and/or test pads on the chips are used to perform such electrical tests. Also, devices may be tested after the chips are singulated from the wafer and/or after the chips are packaged (partially or completely). Chip packages may have any of a wide variety of layouts and designs, such as side pins, pin arrays, and ball grid arrays. There is a need to test fuse elements in memory devices. To test a fuse element in a memory device, often the device includes an extra terminal connected to the fuse element specifically for testing the fuse element. However, this extra test terminal is typically not used during normal operation of the device. Thus, it would be highly desirable to have a way to test the fuse elements in a memory device without the need for extra test terminals, which consume valuable chip real estate and require extra wiring in the metallization layers.